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<div class='keping'><a atrget='_blank' href='/article/evaluation.html#index22'><div class='tbs'><div class='tb'><div class='d1'>Diodes</div><div class='d2 bke'><em>Power Integrity Analysis</em></div><div class='d3'>As a transistor-level power integrity analysis solution, Empyrean Patron® features dynamic EM/IR, self-heating effect, and multi-state EM/IR analysis. It also features a lightweight, easy-to-configure, user-friendly, and visualized interface that supports layout back-annotation of all power integrity analysis resul...</div></div></div></a></div><div class='keping'><a atrget='_blank' href='/article/evaluation.html#index21'><div class='tbs'><div class='tb'><div class='d1'>Willsemi</div><div class='d2 bke'><em>Layout Reliability</em></div><div class='d3'>Willsemi has adopted Empyrean Polas® as its reliability analysis solution to make its product designs more reliable and rational. "As the design complexity increases, power design scenarios are becoming trickier than ever. In addition to single tubes, a variety types of multi-tube series are involved in the de...</div></div></div></a></div><div class='keping'><a atrget='_blank' href='/article/evaluation.html#index19'><div class='tbs'><div class='tb'><div class='d1'>MPS</div><div class='d2 bke'><em>Analog Design</em><em>Power IC</em></div><div class='d3'>"Benefiting from abundant experiences and test data, MPS has been leading the CMOS power supply technology in the world. With help from Empyrean's Polas power layout analysis solution, we were able to analyze and build the required reliability into the design prior to tape out. We also chose Empyrean for their exce...</div></div></div></a></div><div class='keping'><a atrget='_blank' href='/article/evaluation.html#index11'><div class='tbs'><div class='tb'><div class='d1'>Diodes</div><div class='d2 bke'><em>Tape-out</em><em>Simulation</em><em>Layout</em></div><div class='d3'>"During chip finishing time, short-debugging is always a painful exercise for us. With Empyrean's Skipper, our engineers could easily and quickly locate and pinpoint the shorts on the layout. Mixed-signal designs usually take a long time to simulate because we have to flatten the digital blocks into transistor-leve...</div></div></div></a></div><div class='keping'><a atrget='_blank' href='/article/evaluation.html#index13'><div class='tbs'><div class='tb'><div class='d1'>Renesas</div><div class='d2 bke'><em>SoC</em><em>CTS</em></div><div class='d3'>"Recent advanced designs have complicated clock structures to achieve higher performance and lower power consumption, which makes it hard to detect the clock problems in a short period of time. Empyrean ClockExplorer can help to report Clock KPI in various design stages such as pre-Place, pre-CTS, and post-CTS, with he...</div></div></div></a></div><div class='keping'><a atrget='_blank' href='/article/evaluation.html#index15'><div class='tbs'><div class='tb'><div class='d1'>O2Micro</div><div class='d2 bke'><em>Power IC</em><em>Analog Design</em><em>Reference Flow</em></div><div class='d3'>"It was necessary to build a smooth mixed-signal IC design flow with a one-stop platform to bring our design method to the next level, with the help of TowerJazz's iPDK and Empyrean's AMS flow, a high degree of automation flow has been made possible. We also chose Empyrean for their ability to provide us excell...</div></div></div></a></div>
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